In 1970, Invoice Harding envisioned a totally automated wafer-fabrication line that may produce built-in circuits in lower than someday. Not solely was such a purpose gutsy 54 years in the past, it will be daring even in right now’s billion-dollar fabs, the place the fabrication time of a sophisticated IC is measured in weeks, not days. Again then, ICs, equivalent to random-access reminiscence chips, have been usually produced in a monthlong stop-and-go march by means of dozens of handbook work stations.
On the time, Harding was the supervisor of IBM’s Manufacturing Analysis group, in
East Fishkill, N.Y. The venture he would result in make his imaginative and prescient a actuality, all however unknown right now, was referred to as Venture SWIFT. To realize such an amazingly quick turnaround time required a degree of automation that might solely be achieved by a paradigm shift within the design of integrated-circuit manufacturing strains. Harding and his staff achieved it, reaching advances that may ultimately be mirrored all through the worldwide semiconductor trade. A lot of SWIFT’s groundbreaking improvements at the moment are commonplace in right now’s extremely automated chip fabrication crops, however SWIFT’s extremely quick turnaround time has by no means been equaled.
SWIFT averaged 5 hours to finish every layer of its fabrication course of, whereas the quickest fashionable fabs take 19 hours per processing layer, and the trade common is 36 hours. Though right now’s built-in circuits are constructed with many extra layers, on bigger wafers the scale of small pizzas, and the processing is extra advanced, these elements don’t altogether shut the hole. Harding’s automated manufacturing line was actually, actually, swift.
A Semiconductor Manufacturing Manifesto
I encountered Harding for the primary time in 1962, and hoped it will be the final.
IBM was gearing as much as produce its first utterly solid-state laptop, the System/360. It was a considerably rocky encounter. “What the hell good is that?” he bellowed at me as I demonstrated how tiny, unpackaged semiconductor cube might be mechanically dealt with in bulk for testing and sorting.
Creator Jesse Aronstein [at far right, in top photo] took a break from managing the tools group of Venture SWIFT to play French horn one night per week with the Southern Dutchess Pops Orchestra. One other key supervisor, Walter J. “Wally” Kleinfelder [bottom left], standing at proper, headed the method group of Venture SWIFT. William E. “Invoice” Harding [bottom right], seen right here in 1973, was a brusque WW II fight veteran and inventive innovator. He conceived and directed IBM’s Venture SWIFT, which succeeded in fabricating built-in circuits in someday.Clockwise from prime: IBM/Pc Historical past Museum; IBM (2)
William E. (“Bill”) Harding was an revolutionary thinker and inventor. He had been growing semiconductors and their manufacturing know-how at IBM for 3 years when the corporate’s new Components Division was fashioned in 1961. Harding grew to become a midlevel supervisor within the new division, liable for growing and producing the tools required to fabricate the System/360’s solid-state gadgets and circuit modules.
He was tough across the edges for an IBM supervisor. However maybe it was to be anticipated of somebody who had grown up in Brooklyn, N.Y., and was wounded thrice in fight in World Struggle II whereas serving in Common George S. Patton’s Third Military. After the warfare, Harding earned bachelor’s and grasp’s levels in arithmetic and physics and have become a member of IEEE.
I joined IBM in 1961, coming from rocket-engine improvement at Common Electrical. Like most engineers on the time, I knew nothing about semiconductor manufacturing. 5 years prior, I had attended a vacuum-tube electronics course by which the professor described the transistor as “a laboratory curiosity, which can or might not ever quantity to something.”
Venture SWIFT occupied a small area, proven right here in yellow, in constructing 310 at IBM’s sprawling East Fishkill semiconductor facility. IBM
Harding’s tough and crude method surfaced each time I crossed paths with him. If he ever went to IBM
“charm school” (administration coaching), there was no discernible proof of it. However, he succeeded in his mission. By 1964, solid-state logic modules for System/360s have been flowing from the Parts Division’s new facility on a former farm in East Fishkill.
In July 1970, I returned to IBM after three years of graduate research. I used to be a first-level supervisor for 4 years previous to that academic break, and didn’t need one other administration job. I needed a purely technical profession, and I joined East Fishkill’s Manufacturing Analysis (MR) group hoping to get one.
Harding and I then crossed paths once more. In mid-August of 1970, he grew to become MR’s prime supervisor. Previous to that, he spent a 12 months growing an IBM company technique for the longer term manufacturing and use of
very-large-scale integrated (VLSI) circuits. He was given command of MR to display the viability of his manufacturing ideas.
An meeting of MR personnel was convened to announce the administration change. After being launched, Harding described his view of future VLSI purposes and manufacturing. These have been his key factors:
- VLSI circuits can be primarily based on field-effect transistor know-how (on the time, bipolar-junction transistors have been dominant);
- Defect-free excessive yields can be paramount;
- Manufacturing can be absolutely automated;
- Greatest outcomes would accrue from processing one wafer at a time;
- Brief turnaround instances would confer vital advantages;
- Quantity would scale up by replicating profitable manufacturing strains.
After the tutorial lecture, Harding modified from professor to commander, Common Patton–fashion. MR’s sole mission was to display Harding’s concepts, and ongoing tasks not aligned with that purpose can be transferred elsewhere inside IBM or deserted. MR would show that an automatic system might be constructed to course of about 100 wafers a day, separately, with excessive yield and a one-day turnaround time.
What? Did I hear that proper? One-day turnaround from naked wafer to completed circuits was what we’d now name a moon shot. Bear in mind, on the time, it usually took greater than a month. Did he actually imply it?
Harding knew that it was theoretically potential, and he was decided to attain it. He declared that IBM would have a considerable aggressive benefit if prototype experimental IC designs might be produced in a day, as a substitute of months. He needed the circuit designer to have testable circuits the day after submitting the digital description to the manufacturing line.
One-day turnaround from naked wafer to completed circuits was what we’d now name a moon shot.
Harding instantly organized an tools group and a course of group inside MR, naming me to handle the tools group. I didn’t need to be a supervisor once more. Now, reluctantly, I used to be a second-level supervisor, liable for growing all of the processing and wafer-handling tools for a yet-to-be-defined manufacturing line that I had barely began to visualise. My dream analysis job had lasted little greater than a month.
Walter J. (“Wally”) Kleinfelder transferred into MR to handle the method group. They would choose the product to fabricate and outline the method by which it will be made—the detailed sequence of chemical, thermal, and lithographic steps required to take a clean silicon wafer and construct built-in circuits on its floor at excessive yield.
Kleinfelder chosen a random-access reminiscence chip, the IBM RAM II, for our demonstration. This product was being produced on-site at East Fishkill, so we’d have every thing we would have liked to construct it and consider our outcomes relative to these of the present nonautomated manufacturing line.
IBM’s SWIFT Pilot Wafer Fab Had a Monorail “Taxi”
Built-in-circuit manufacturing entails first creating the transistors and different parts of their correct locations on the silicon wafer floor, after which wiring them collectively by including a skinny movie of aluminum selectively etched to create the required wiring sample. That skinny movie of conductor is called the wiring, or metallization, layer.
IC manufacturing makes use of
photolithography to create the numerous layers, every with a particular sample, wanted to manufacture an IC. These embody the steel wiring layers, of which there might be greater than a dozen for a sophisticated chip right now. For these steps, the steel layer on the wafer is coated with a light-sensitive photoresist materials, after which a picture of the sample is uncovered on to it. The areas the place conductors can be fashioned are blocked from the sunshine. When the picture is developed, the resist is faraway from the sample areas that have been uncovered, enabling these areas to be etched by an acid. The remainder of the floor stays protected by the acid-proof resist. After etching is accomplished, the remaining protecting resist is eliminated, leaving simply the wiring layer within the required sample.
The IC course of additionally makes use of lithography to create transistors and different parts on the silicon wafer. Right here, openings are etched in insulating layers by means of which tiny quantities of particular impurities might be infused into the uncovered spots of pure silicon to vary {the electrical} properties. Producing the RAM-II ICs required 4 separate lithographic operations utilizing 4 completely different patterns: three for creating the transistors and different parts, and one to create the steel wiring layer. The 4 patterns needed to be precisely aligned with each other to efficiently create the chips.
Lithography is just a part of the IC manufacturing course of, nonetheless. Within the present manufacturing line, it took many weeks to course of a RAM-II wafer. However the uncooked course of time—the time a wafer spent really being labored on at numerous thermal, lithographic, chemical, and deposition stations—was lower than 48 hours. Most of a wafer’s time was spent ready to bear the following course of step. And a few steps, chemical cleansing particularly, might be eradicated if wafers progressed shortly from one step to the following.
It was the duty of Kleinfelder’s group to find out which steps might be eradicated and which might be accelerated. The ensuing uncooked course of time was lower than 15 hours. It then fell to
Maung Htoo, my supervisor of chemical-equipment improvement, to check the proposed course of. His folks hustled 1.25-inch-diameter wafers by means of a “pots and pans” lab setup to guage and refine it. The abbreviated process efficiently produced working circuits in about 15 hours, as anticipated.
The structure of an automatic system materialized. It was initially envisioned as a sequence of linked machines, every performing one step of the method, like an vehicle meeting line. However tools downtime for preventative upkeep and restore of breakdowns needed to be accommodated. This was achieved by the insertion of short-term storage “buffers” that may briefly retailer wafers at chosen factors within the course of chain when vital.
This course of chain idea was additional disrupted by concerns associated to lithographic-pattern imaging. Publicity of the photoresist on wafers was generally achieved on the time by a course of analogous to photographic contact printing. The lithographic masks, by means of which mild shone when exposing the photoresist, was the equal of a photographic destructive. Any defect or particle on the masks would lead to a corresponding defect on a chip, on the identical location, wafer after wafer.
The East Fishkill lithography group had developed a noncontact 10:1 discount
step-and-repeat image projector. Consider it as a type of photographic slide projector that produced a shrunken picture containing the sample for a single layer on a chip. It then “stepped” throughout the wafer, exposing one chip location at a time. Relative to contact masking, the stepper promised decrease sensitivity to particulate contamination, as a result of the scale of the shadow of any stray particle can be lowered by 10:1. Different benefits included larger optical decision and longer masks life.
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As a result of it was sluggish, although, a number of steppers can be wanted to fulfill the throughput goal. Attaining the very best sample alignment on every wafer for a number of sample exposures required {that a} wafer be routed again to the identical stepper for publicity of every layer within the course of chain. That will cancel the impact of picture distortions launched by slight variations from one machine to a different. Constructing the RAM-II circuits then required {that a} wafer make 4 separate journeys to its assigned stepper. That divided the linear sequence into 5 sectors. A monorail “taxi” would take a wafer from one processing sector to its assigned stepper, and return later to take it to its subsequent sector.
Every of the 5 sectors was envisioned to be an enclosure containing all the automated wafer-processing and dealing with tools required to perform that section of the method chain. The sector enclosures and the taxi can be designed to supply a clean-room-quality native atmosphere for the wafers. Inside a sector enclosure, usually, a wafer would cross immediately from a wet-chemistry module to miniature furnaces to a photoresist software module, and, lastly, to the taxi pickup port. Contained in the wet-chemistry module, for instance, the wafer would bear cleansing, improvement of the photoresist and its removing, and etching, amongst different procedures.
Management of your complete line was to be achieved at three ranges. Total production-line administration, recordkeeping, taxi logistics, and course of monitoring can be dealt with by a central computer-based system. Devoted controllers, one for every sector, would handle wafer logistics inside the sector and feed wafer site visitors and processing information to the central system. The person processing and wafer-handling modules inside every sector enclosure would have their very own specialised controls, as wanted, for impartial setup and upkeep.
Lastly configured, our automated demonstration line for the RAM-II chips would consist of 5 sectors, a taxi, and a lithographic-pattern imaging middle, all managed by laptop. Six months after Harding took command, MR began to design and construct the precise system.
The Brash Center Supervisor Discovered Inspiration in Literature
Harding made frequent journeys to
IBM’s headquarters, in Armonk, N.Y., to report progress, request sources, rebut challenges, and persuade the highest brass that the cash being spent was a superb funding sooner or later. It was a troublesome mission. His prolonged weekly workers conferences usually mirrored the stress he was underneath. He lectured at size on issues he knew we knew, advised allegorical tales, and spun analogies.
On the time, I didn’t understand that he was utilizing his workers conferences to develop and refine concepts for the shows at Armonk. He was noting our reactions and adjusting his presentation concepts accordingly. His shows to the highest brass have been efficient. In the course of the venture, spanning about three years, MR had all of the funding and assist it wanted to develop, design, construct, and function your complete system.
At one workers assembly, Harding learn aloud Heywood Broun’s quick story “
The 51st Dragon,” to emphasise the facility of a reputation or slogan to encourage folks to attain the inconceivable. His level, after all, was that we would have liked a very good title for the venture. “SWIFT” was ultimately chosen. Harding all the time insisted that it was not an acronym, however however folks figured it was shorthand for “Semiconductor Wafer Built-in Manufacturing unit Expertise.”
SWIFT’s extremely quick turnaround time has by no means been equaled.
SWIFT’s processing and wafer-handling tools was customized completely inside IBM’s Parts Division. The first design targets have been to course of wafers mechanically, persistently, and uniformly and hold them clear and undamaged. Wafer-handling experiments sorted out the cleanest and gentlest strategies. Dealing with tools was designed to assist the wafer quite than grip it. A novel wafer handler that used a movement of air above the wafer to elevate it, with out bodily contact, was efficiently integrated for among the wafer-transport strikes.
There was one exception to the “clear and delicate” design of SWIFT’s dealing with equipment. Administration on the Parts Division’s Burlington, Vt., web site pressured Harding to make use of “air-track” wafer-transport tools that that they had developed. This tools used airflow to elevate and transfer wafers, very similar to a puck in a sport of air hockey. Harding wanted Burlington’s continued assist, so he decreed that some air-track tools be utilized in SWIFT. And it was, though wafer-contamination and reliability questions have been unresolved.
One other top-down decree explains why SWIFT ended up with two several types of sector management programs—the antithesis of excellent design for maintainability. A customized controller had been designed, and 5 items have been being constructed (one for every sector), when HQ required that we incorporate the newly introduced
IBM System/7, which had been developed particularly for factory-equipment and process-control purposes. In any case, if IBM itself didn’t use the pc in its personal superior manufacturing line, potential prospects would marvel “why not?” But when SWIFT used a System/7 and the venture proved to achieve success, it will assist promote System/7s. And so for the 5 sectors, SWIFT ended up with 4 customized controllers and one System/7. Each sorts labored nicely.
Tools reliability was SWIFT’s Achilles’ heel. To assist obtain excessive reliability and ease of upkeep, sure mechanisms and controls have been standardized to be used all through the system, they usually have been chosen for reliability and ease quite than novelty or magnificence. For instance, an individual observing the system in operation would discover that many motions have been achieved in discrete easy steps quite than a single traverse. Underlying that peculiarity was the in depth use of the easy, strong, and dependable
Geneva drive, initially developed centuries in the past for clocks, however now tailored for linear and rotary motions that needed to be easy and exactly locked in on the finish factors. Every simply managed flip of the Geneva drive’s enter shaft made one step. Lengthy traverses required a number of turns of the shaft, ensuing within the odd-looking motions.
Inside a sector’s enclosed chamber, a wafer went by means of a sequence of completely automated processing steps. Two of the early idea sketches are represented right here. The wafers got here into the higher chamber with a sample uncovered onto the resist and underwent a sequence of processing steps that included improvement, hardening, etching, and others, as indicated.
One other simplification concerned spinning the wafers to centrifugally unfold liquid photoresist that was dropped onto the middle of the wafer. In present strains, “improper spin velocity” was incessantly cited as the reason for resist-related wafer-processing rejects. Spin velocity was eradicated as a variable by driving SWIFT’s spinners with synchronous AC motors locked to three,600 rpm by their 60-hertz AC energy supply, simply as phonograph turntables are pushed. No velocity controllers can be required. The specified photoresist movie thickness can be achieved by adjusting the remaining variables—temperature, viscosity, and/or spin time. Ultimately, system reliability was improved by the elimination of 4 separate velocity controllers.
As SWIFT progressed from blue-sky idea to precise {hardware} implementation, Harding adjusted MR’s group and gained the cooperation of supporting teams. He noticed to it that his folks had the sources to do the job and will concentrate on the venture. I got here to admire his organizational abilities and his skill to single out and recruit top-notch expertise from inside the firm.
Harding established a gaggle to develop SWIFT’s grasp management system, which monitored the progress on every wafer because it moved by means of the sectors. This Execution Management System (ECS) was primarily based on an
IBM 1800. Every wafer had a serial quantity and was tracked at each step by means of the road. The ECS saved and monitored every wafer’s processing parameters, detecting and reacting shortly to out-of-spec conditions. Its punch playing cards and tape cartridges appear quaint by right now’s measure, nevertheless it was a significant advance in manufacturing management and monitoring for a wafer line.
He additionally transferred a complete instrumentation division, managed by Sam Campbell, from IBM Endicott to East Fishkill. Campbell’s division subsequently developed groundbreaking strategies for real-time, in-situ course of management for SWIFT.
A Brief Life however an Enduring Legacy in Semiconductor Manufacturing
Mockups of furnaces and chemical processors have been constructed and examined.
Robert J. Straub’s division in East Fishkill’s Manufacturing Engineering group designed and constructed the sectors and the processing tools modules inside them. Harding introduced in Bevan P.F. Wu to handle the set up, debugging, and operation of the road. As tools and services coalesced in SWIFT’s devoted 4,000-square-foot area, Rolf H. Brunner, who had managed a superb portion of the sector designs together with improvement of the vacuum metal-deposition tools, took duty underneath Wu for tools set up, startup, and debugging.
Just one operation in your complete course of was not absolutely automated. Alignment of the wafer for exposing the sample on the photoresist nonetheless relied on a well-trained operator. In its remaining type, SWIFT had each a ten:1 optical stepper and likewise a 1:1 contact-mask machine, however because it occurred, many of the chips produced have been with the 1:1 machine, as a result of the throughput was larger that manner.
By the top of 1973, IBM HQ was already satisfied that full automation of wafer processing may succeed. A lot in order that this purpose was adopted as a main goal for a brand new wafer-processing line to supply the circuits for IBM’s next-generation laptop, the “FS” (
Future System). The proposed new line was dubbed “FMS” (Future Manufacturing System), and SWIFT was renamed “FMS Feasibility Line.”
Bevan Wu efficiently managed the road’s completion, check runs, personnel coaching, and refinements of apparatus, course of, and procedures. He introduced the road to the purpose of being certified to supply circuits for IBM merchandise. The system made 5 continuous-operation runs between mid-1974 and early 1975. Between runs, his group analyzed outcomes and applied enhancements. The longest steady run spanned 12 days. Wafer throughput averaged 58 wafers per day, 83 % of its designed most. Common turnaround time from bare-wafer enter to testable-circuits output was about 20 hours. The uncooked course of time was 14 hours. The yield finally equaled the very best ever achieved by East Fishkill’s standard RAM-II manufacturing line.
A complete of 135 technicians, engineers, and managers from IBM areas worldwide have been educated on the operation of the system. They produced 600 product-quality wafers with 17,000 RAM-II FET reminiscence chips.
However like his WWII commander, Common Patton, Harding was bypassed to guide “the large present”—in Harding’s case, the creation of the brand new FMS automated line. Leaving the administration profession ladder behind, he was promoted to IBM Fellow, the very best nonmanagement degree within the firm.
The FMS Feasibility Line, initially SWIFT, made its final steady run in early 1975. It had achieved its targets. Its folks have been now wanted to assist create the FMS line to supply FS computer systems. However later in 1975, the FS venture was canceled, and FMS grew to become superfluous. A portion of the tools destined for FMS grew to become East Fishkill’s
QTAT (Quick Turn Around Time) line, a groundbreaking IBM showpiece that’s higher remembered than its obscure predecessor, Venture SWIFT.
Though SWIFT’s life was quick, and it was by no means within the limelight, its many inventions are clearly seen in right now’s semiconductor fabs. Like SWIFT, these fabs are extremely automated and laptop managed; have a central transport system and “Bernoulli” handlers, which exploit the movement of air to elevate wafers with out making bodily contact; apply resist instantly after oxide or steel movie formation; use steppers for lithographic sample publicity; and make use of real-time course of management. All of those have been groundbreaking options of Venture SWIFT 50 years in the past.
The expertise of working underneath Harding on SWIFT for 3 years was, for me, transformative. What had began with trepidation ended with admiration. I’ve come to contemplate Invoice Harding a real genius, in his personal manner. Spurred on and supported by his distinctive administration fashion, a small group of devoted folks achieved way over anybody initially envisioned. Greater than even we ourselves thought potential.
We consider the primary achievers in an trade because the “fathers” of the trendy embodiment of their innovations. Edison, Bell, Ford, and the Wright brothers, are generally spoken of this fashion. In that sense, William E. Harding is clearly the daddy of the trendy, automated, billion-dollar fab.
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